During AMD’s Computex 2024 keynote, AMD CEO Dr. Lisa Su officially unveiled and announced the company’s next generation of Ryzen processors. Today marks the first reveal of AMD’s highly anticipated Zen 5 microarchitecture across the Ryzen 9000 series, which is set to bring several advancements over Zen 4 and the Ryzen 7000 series of desktops, which will launch sometime in July 2024.
AMD has unveiled four new SKUs using its Zen 5 microarchitecture. The AMD Ryzen 9 9950X processor will be the new consumer flagship, featuring 16 CPU cores and a fast maximum boost frequency of 5.7GHz. Other SKUs include 6, 8, and 12 cores, giving users a variety of core and thread counts. All four of these initial chips will be X-series chips, meaning they will have unlocked multipliers and higher TDPs/clock speeds.
In terms of performance, AMD is touting an average (incremental) IPC increase in Zen 5 desktop workloads of 16%. With the new Ryzen desktop chips’ turbo speeds remaining largely identical to their Ryzen 7000 predecessors, this should translate into similar performance expectations for the new chips.
The AMD Ryzen 9000 series will also launch on the AM5 socket, which debuted with AMD’s Ryzen 7000 series and represents AMD’s commitment to socket/platform longevity. Along with the Ryzen 9000 series will come a pair of new high-performance chipsets: the X870E (Extreme) chipset and the regular X870 chipset. The core features that vendors will include in their specific motherboards remain undetermined. However, we do know that USB 4.0 ports are standard on the X870E/X870 boards, along with PCIe 5.0 for both PCIe graphics and NVMe storage, with higher support for the AMD EXPO memory profile expected than previous generations.
AMD Ryzen 9000: Bringing up to 16C/32T of Zen 5 to the desktop
Zen 5 is AMD’s latest advancement in Ryzen microarchitecture. Although AMD hasn’t revealed many technical details, we do know some brand new features that Zen 5 will offer.
AMD desktop CPU generations | |||
Anand Tech | Ryzen 9000 (Granite Ridge) |
Ryzen 7000 (Raphael) |
Ryzen 5000 (Vermeer) |
CPU architecture | Zain 5 | Zain 4 | Zain 3 |
CPU cores | Up to 16C/32T | Up to 16C/32T | Up to 16C/32T |
Graphics processing unit architecture | deoxyribonucleic acid2 | deoxyribonucleic acid2 | nothing |
GPU cores | 2 | 2 | nothing |
memory | DDR5-5600 | DDR5-5200 | DDR4-3200 |
platform | AM5 | AM5 | AM4 |
PCIe lanes for the CPU | 24x PCIe 5.0 | 24x PCIe 5.0 | 24x PCIe 4.0 |
Manufacturing process | CCD: TSMC N4 IOD: TSMC N6 |
CCD: TSMC N5 IOD: TSMC N6 |
CCD: TSMC N7 IOD: GloFo 12nm |
Given the architectural differences between the last two generations (Zen 4 and Zen 3) and Zen 5, we know that AMD is using a new manufacturing process for its Ryzen 9000 desktop chips. While many have touted and speculated that Zen 5 for desktops will be built on one of TSMC’s N3 (3nm) nodes, some of our sources say that Zen 5 CCD will be built on TSMC N4 – although we are awaiting official confirmation on this. This (Update: TSMC 4nm consumer Ryzen CCD has now been confirmed). Furthermore, AMD’s mobile counterpart, the 4nm Ryzen AI 300 (Strix Point) series, has been confirmed to offer, and we have yet to see AMD’s desktop CPU produced on a more advanced node than its mobile counterpart.
While AMD isn’t offering a deep look at the Zen 5 architecture at Computex, the company did touch on a few of the key architectural improvements to Zen 4 that will come with the new CPU architecture. This starts with an improved branch predictor, which is designed to provide better accuracy and efficiency and reduce the overall latency of instruction cycles. The Zen 5 architecture also features higher throughput with wider SIMD pipelines and chipsets, allowing for faster data processing and equating to better overall performance in benchmarks like CineBench, Blender, and workloads that leverage the AVX-512 instruction set.
Additionally, Zen 5 introduces a deeper out-of-order instruction window size throughout its design, allowing for more parallelism and better handling of multiple instructions within a pipeline at once.
There are also a few points within the Zen 5 architecture where AMD has doubled resources or performance. L2 to L1 memory bandwidth is one example of this, giving the cache hierarchy a significant bandwidth boost that would allow faster data transfer within individual CPU cores. AMD also claims better AI performance in inference and AVX-512 workloads. Notably, AMD AVX-512 support on Zen 4 was implemented using a 256-bit SIMD over two cycles, so this may be a sign that AMD has expanded the AVX-512 SIMDs to a full 512-bit width in the Zen 5 architecture. (Update: Confirmed Since then by AMD the Zen 5 now has a full 512-bit wide SIMD chip to process AVX-512 instructions)
Collectively, these improvements aim to deliver significant performance gains over the previous Zen 4 microarchitecture, with AMD touting an average (geomantic) 16% IPC increase over Zen 4 in desktop workloads. However, it’s worth noting that the top score in this benchmark set is in the GeekBench 5.3 AES XTS benchmark, which takes advantage of the VAES512 and VAES256 extensions to the AVX-512 instruction set. So AMD’s AVX-512 SIMD changes greatly impact this benchmark in particular (though not exclusively).
Above is a view of a Ryzen 9000 series chip with two core complex dies (CCD), which depicts the silicon configuration and layout. As with previous generations of Ryzen processors, there is a large central input/output die (IOD), through which all I/O and memory operations are routed. As for the CCDs, each die again has 8 CPU cores, with AMD equipping the Ryzen chips with either 1 or 2 CCDs depending on the SKU. The new Zen 5 CCDs are manufactured using one of TSMC’s 4nm processes (AMD hasn’t confirmed which flavour), a modest downgrade from the N5 process used in Zen 4 CCDs.
Meanwhile, although AMD has not confirmed that it is reusing the Ryzen 7000 series IOD here, all signs currently point to the Ryzen 9000 IOD being similar or identical to it. In particular, it is made using the same TSMC N6 process, with the same two RDNA GPUs, and offers the same off-chip I/O capabilities (although the latter is also dictated by the AM5 socket).
AMD’s Ryzen 9000 chipsets will also feature similar memory support as their predecessors, with AMD sticking with DDR5 memory. However, AMD notes that the upcoming X870E and X870 motherboard chipsets will allow for faster EXPO memory files than those found in Zen 4. At this time, AMD has not revealed the JEDEC memory specifications for the four Ryzen 9000 SKUs it announced today. However, we expect to know more before the Ryzen 9000 family launches in July 2024. According to AMD product pages published since the keynote, the Ryzen 9000 family will top out at JEDEC DDR5-5600 speeds for in-warranty configurations.
AMD Ryzen 9000 series processors Zen 5 Micro Architecture (Granite Series) |
|||||||
Anand Tech | Cores / Threads |
a base Repetition |
Turbocharged Repetition |
L2 cache |
L3 cache |
TDP | Management systems renewal project |
Ryzen 9 9950X | 16C/32T | 4.3GHz | 5.7 GHz | 16 MB | 64 MB | 170 watts | TBD |
Ryzen 9 9900X | 12C/24T | 4.4GHz | 5.6 GHz | 12 MB | 64 MB | 120 watts | TBD |
Ryzen 7 9700X | 8C/16T | 3.8 GHz | 5.5 GHz | 8 MB | 32 MB | 65 watts | TBD |
Ryzen 5 9600X | 6C/12T | 3.9 GHz | 5.4 GHz | 6 MB | 32 MB | 65 watts | TBD |
AMD’s announcement of AMD’s desktop Zen 5 and imminent Ryzen 9000 introduces four X-series SKUs at launch, allowing for overclocking and coming with unlocked CPU multipliers. The flagship SKU, the Ryzen 9 9950X, features 16 cores, a maximum boost clock of 5.7GHz, 80MB of cache split between 64MB of L3 and 16MB of L2 (1MB per L2 core) and 170W TD with me. The Ryzen 9 9900X offers 12 cores, a maximum boost clock of 5.6GHz, 64MB of L3 cache, and a 120W TDP.
Moving down the Ryzen 9000 lineup is the Ryzen 7 9700X, which comes with 8 cores, a maximum boost clock of 5.5GHz, 32MB of L3 cache, and a 65W TDP. Finally, the entry-level SKU, the Ryzen 5 9600X, has just 6 cores, a max boost clock of 5.4GHz, 32MB of L3 cache, and a 65W TDP.
The next slide refers to the flagship Zen 5 chip. The Ryzen 9 9950X competes with the current 14th generation Intel Core i9-14900K. In productivity and content creation tasks, the Ryzen 9 9950X shows a 7% improvement in Procyon Office, a 10% increase in Puget Photoshop, and a 21% increase in Cinebench R24 nT. More importantly, it shows a 55% performance boost in the handbrake and a 56% increase in the mixer.
Interestingly, gaming data shows marginal gains in some games, although it highlights more significant increases in others. AMD’s internal testing shows that the Ryzen 9 9950X outperforms the Intel Core i9-14900K by 4% in Borderlands 3, 6% in Hitman 3, and 13% in Cyberpunk 2077. Furthermore, it achieves a 16% improvement in F1 2023, an increase 17% increase in DOTA 2, and 23% increase in Horizon Zero Dawn.
As mentioned, AMD is committed to extending its AM5 socket for longevity, at least much more than other vendors are offering with their own CPU launches and updates. As such, AMD’s Ryzen 9000 series runs on the current AM5 platform. While the Ryzen 9000 is fully compatible with existing 600-series motherboards, AMD has also prepared two new 800-series motherboard chipsets for the launch of Zen 5 on desktops. The X870E (Extreme) and X870 chipsets will be featured on several new motherboards at launch, and a big part of Computex this week will be motherboard vendors (mostly local Taiwanese companies) showing off their new products.
AMD has only provided a few details about the X870E and X870 chipsets. Of particular note is that USB 4.0 support will be standard on all X870(E) motherboards, while it was optional on the X670(E) series boards. The X870(E) boards will also have Wi-Fi 7 support (up from the 6E in the 600 series), and at least one PCIe 5.0 NVMe slot will still be mandatory. AMD also notes that motherboards built on both systems “feature 44 total PCIe lanes,” which can be broken down into 24 lanes from the CPU, and another 20 lanes coming from the chipset.
AMD AM5 chipset comparison | |||||
feature | X870E | X870 | X670E | X670 | B650E |
PCIe CPU (PCIe) | 5.0 | 5.0 | 5.0 | 4.0 | 5.0 |
PCIe for CPU (M.2 slots) | At least one PCIe 5.0 slot | ||||
Total PCIe lanes for the CPU | 24 | ||||
Chipset PCIe lanes (max) | 4.0: 12 3.0:8 |
4.0: 8 3.0:4 |
4.0: 12 3.0:8 |
4.0: 8 3.0:4 |
|
USB4 | Is mandatory (Discrete, takes 4 PCIe 4.0 chipset lanes) |
My choice | |||
SATA ports (max) | 8 | 4 | 8 | 8 | 4 |
Support DDR5 | Quad-channel (128-bit bus) | ||||
Wifi | Wi-Fi 7 (separate) | WiFi 6E (separate) | |||
Support CPU overclocking | Yes | ||||
Support for memory overclocking | Yes | ||||
# of chips | 2 | 1 | 2 | 2 | 1 |
Silicone | ASMedia Promontory 21 | ||||
available | July 2024 | July 2024 | September 2022 | September 2022 | October 2022 |
Right now, different AMD resources are conflicting with each other about PCIe 5.0 – or at least, they’re not completely clear about it. according to AMD AM5 chipset pageBoth the X870 and X870E feature a PCIe 5.0 interface for both NVMe CPU lanes and PEG CPU lanes. However, AMD’s press release states that the X870E “features 24 PCIe 5.0 lanes, with 16 dedicated graphics lanes,” meaning the vanilla X870 will not require PCIe 5.0 support. We’re scouring AMD and its motherboard vendors to learn more.
Looking under the hood, AMD confirmed that the new chipsets are not based on new silicon. Instead, the company is using the same ASMedia design as in the X670/B650 chipset: the Promontory 21 controller. Since the feature sets of the newer X870E/X870 motherboards are basically similar to those of the When using newer external controllers like Wi-Fi 7, there is obviously little need to change the chipset itself. Although there are no major changes, it does raise the question of why AMD would skip a generation in its nomenclature (700 series anyone?) and go straight to the 800 series chipset.
The AMD Ryzen 9000 series, including the Ryzen 9 9950X (16C/32T), Ryzen 9 9900X (12C/24T), Ryzen 7 9700X (8C/16T), and entry-level Ryzen 5 9600X (6C/12T) is expected to arrive at Retail channels sometime in July 2024. At the time of writing, AMD has not provided pricing.
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